A Linux Foundation Project
IBM POWER11 CPU Die
OpenPOWER Foundation · Consortium Initiative

Enterprise Sovereignty
Initiative

Regulated industries fund it. Hyperscalers build it. Everyone runs it. A co-funded open source program delivering the complete POWER-class infrastructure stack — processor, management console, service processor, AI accelerator, and reference platform — at a fraction of today's proprietary system cost.

IBM POWER11 CPU Die
3
US founding fabs
Intel · TSMC · Samsung
Cost +10%
Cooperative bare metal procurement
for founding enterprise members
6 Layers
Fully open stack
ISA · RoT · Firmware · UCIe · OS · Toolchain
20
Founding enterprise
member slots — hard limit

Two Industries. One Problem.

Regulated enterprises running POWER infrastructure need AI — but face a double lock-in: proprietary management and firmware stacks on their existing servers, and NVIDIA's closed ecosystem for any new AI workload. Hyperscalers and platform companies have spent billions building in-house silicon capability specifically to escape that same NVIDIA pricing trap. For the first time, their interests perfectly align. The ESI is the structure that lets both groups act on that alignment.

AI Inference Cost

Deploying AI at scale on proprietary accelerator hardware carries per-unit costs and ecosystem lock-in that compound over time. An open inference accelerator designed and owned by its users breaks that pricing dynamic permanently.

Firmware Auditability

DORA, NIS2, FFIEC, and emerging AI Act guidance increasingly require source-level visibility into critical infrastructure software. Proprietary management firmware and service processors executing below the OS cannot satisfy that requirement.

Single-Vendor Continuity Risk

No open source alternative exists today for enterprise POWER management console or service processor firmware. The ESI builds both — under Linux Foundation governance, with multi-vendor hardware support.

Silicon Design Expertise

Regulated industries have capital and urgent requirements. Hyperscalers have in-house silicon design teams that have already taped out production AI chips. The ESI pairs the two — industry funds, hyperscalers build, everyone owns the result.

OpenPOWER Stack

The Power ISA is the open foundation. The ESI builds everything above it — so that regulated industries can run a fully auditable, competitively sourced POWER-class infrastructure stack from processor silicon to management console.

Layer
Proprietary Stack Today
ESI Open Equivalent
Management Plane
Closed management console — appliance-locked, single-vendor, no source access
OpenHMC — open source, libvirt-based, REST API, full LPAR lifecycle
Hypervisor
Proprietary Type-1 firmware hypervisor — single-vendor, closed source
KVM on OPAL — enterprise LPAR-equivalent, live migration, open source
Service Processor
Proprietary service processor — closed BMC firmware, unauditable
OpenFSP — OpenBMC on OCP DC-SCM, fully auditable source
Boot Firmware
Proprietary hostboot — closed, single-vendor signed
skiboot / OPAL — open source, Linux Foundation maintained
AI Accelerator
Proprietary AI inference SoC — closed RTL, single-vendor ecosystem
OpenAIU — 32-core open inference SoC, AXU-coupled, open OMI, 75W PCIe
Processor Silicon
Single-vendor processor — closed design, no multi-foundry option
OpenCore (A2O · POWER ISA) — open RTL, multi-foundry capable
Instruction Set
Power ISA — open, royalty-free, IBM patent coverage via OPF
Same. The foundation is already open.

Five Open Source Projects. One Complete Stack.

Each project has a discrete charter, deliverables, steering committee, and milestone timeline. Consortium members fund the portfolio as a whole; individual projects may also receive targeted contributions.

Project 01

OpenCore Processor

A2O Core · POWER ISA · Open RTL

An open source POWER ISA processor core — based on the A2O out-of-order design — that any consortium member can synthesize, tape out at a commercial foundry, or deploy on FPGA. The silicon foundation beneath everything else.

Read Charter
Project 02

Open Management Console

OpenHMC · libvirt · REST API · Cockpit UI

An open source enterprise POWER management console. Manages logical partitions, live migration, power control, and hardware inventory across a POWER estate — with full source auditability, no appliance lock-in, and a documented REST API.

Read Charter
Project 03

OpenFSP Service Processor

OpenBMC · DC-SCM · OCP Standard

An open source service processor with enterprise-class capabilities — out-of-band management, hardware error logging, secure boot, and TPM-backed attestation — built on OpenBMC and housed in the OCP DC-SCM form factor.

Read Charter
Project 04

OCP Reference Platform

DC-MHS · DC-SCM · OCP Rack · Open BOM

A complete server platform reference design built on OCP Data Center Modular Hardware System standards — integrating OpenCore, OpenFSP, and OpenHMC into a published, multi-vendor manufacturable hardware stack.

Read Charter
Project 05

Open Inference Accelerator

OpenAIU · 32 AI Cores · OMI · 75W PCIe · 5nm

An open source AI inference SoC — 32 systolic-array AI cores coupled to a POWER ISA control processor via the AXU interface — targeting enterprise AI inference performance in a 75W PCIe card with full arithmetic auditability.

Read Charter

The Consortium Model

Two groups have arrived at the same problem from opposite directions. Regulated industries carry the cost of proprietary POWER infrastructure and face exploding AI inference bills from closed vendor ecosystems. Hyperscalers and platform companies have the silicon design expertise and the same motivation to break vendor-controlled AI hardware pricing. The ESI brings both groups together under OpenPOWER Foundation governance — a Linux Foundation project with established IP frameworks and IBM patent coverage for all POWER ISA implementations.

Track 1 — Primary Funders
Regulated Industry Members
Banks, insurers, healthcare systems, and other regulated enterprises already running POWER infrastructure — investing to eliminate vendor lock-in and accelerate AI deployment at a fraction of proprietary cost.
Founding Industry Member $5M / 3-year
  • Seat on Technical Steering Committee across all five projects
  • Requirements authority — shape specifications to your compliance needs
  • Named co-developer in all IP documentation and announcements
  • Priority hardware allocation from reference platform production run
  • Designated engineer seats per project (funded from consortium budget)
  • IBM patent coverage via OPF membership
Strategic Industry Member $1M / year
  • Advisory Board seat — roadmap input and review rights
  • Early access to all deliverables (90 days before public release)
  • Reference platform hardware access for internal evaluation
  • IBM patent coverage via OPF membership
Supporting Member $250K / year
  • Access to all public deliverables as released
  • Working group participation rights
  • IBM patent coverage via OPF membership
Target members: Tier 1 banks · insurance carriers · healthcare systems · energy companies
Track 2 — Co-Developers
Technology Platform Partners
Hyperscalers and platform companies contributing in-house silicon design expertise and engineering resources — co-developing the open inference accelerator and platform stack they will also deploy at scale.
Principal Engineering Partner Engineering + capital
  • Co-lead silicon design on OpenAIU inference accelerator
  • Joint authorship on chip architecture specifications
  • Co-ownership of tape-out process and foundry selection
  • TSC co-chair seat on OpenAIU and OCP Reference Platform projects
  • Named co-developer across all public IP and press materials
  • IBM patent coverage via OPF membership
Engineering Contributor Engineering + $500K / year
  • Assigned engineering team to specific ESI projects
  • TSC participation rights across contributed projects
  • Early hardware access for internal deployment evaluation
  • IBM patent coverage via OPF membership
Target partners: Meta · Microsoft · Google · other hyperscalers with in-house silicon teams

All participation includes standard OpenPOWER Foundation membership. All consortium outputs are released under OSI-approved open source licenses under OPF governance. Contact us to discuss terms tailored to your organization's contribution model.

Delivery Roadmap

Three phases over 36 months, from specification to production-ready reference platform. Founding members lock in roadmap influence during Phase 1.

Phase 1 · Months 1–12

Foundation & Specification

  • Consortium formation and governance ratified
  • OpenCore POWER ISA compliance gap analysis
  • OpenHMC architecture specification published
  • OpenFSP bring-up on existing OPAL/skiboot hardware
  • OCP DC-MHS/DC-SCM platform requirements finalized
  • A2O + POWER Commons + LibrePOWER integration scoped
Phase 2 · Months 13–24

Build & Validate

  • OpenHMC alpha: LPAR provisioning, power control, REST API
  • OpenFSP on DC-SCM hardware, OpenBMC integration complete
  • OpenCore POWER ISA RTL feature-complete, FPGA verified
  • OCP reference platform schematics released
  • Live migration prototype on KVM/OPAL demonstrated
  • Security audit of OpenFSP and OpenHMC by third party
Phase 3 · Months 25–36

Production Ready

  • OpenHMC 1.0: full LPAR lifecycle, live migration GA
  • OpenCore tape-out at target process node
  • OCP reference platform manufacturing BOM published
  • OpenFSP 1.0 with hardware error analysis and alerting
  • Full stack integration validated on reference hardware
  • Founding member production hardware delivered

Regulated Industries Fund It. Hyperscalers Build It. Everyone Owns It.

If your organization runs POWER infrastructure and is paying too much for AI — or if your silicon team already knows what open inference hardware should cost — contact us for the full technical brief and consortium prospectus.